`timescale 1ns / 1ps

//////////////////////////////////////////////////////////////////////
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////  Part of the project chess controller                        ////  
////                                                              ////
////                                                              //// 
////  Description                                                 //// 
////   -                                 //// 
////                                                              //// 
////  To Do:                                                      //// 
////   -                                //// 
////                                                              //// 
////  Author(s):                                                  //// 
////      - Sergio Gonzalez Q, sergiogq@hotmail.es                ////
////      - Alejandro Morales A, ale3191@gmail.com                //// 
////                                                              //// 
////////////////////////////////////////////////////////////////////// 
////                                                              //// 
//// Copyright (C) 2009 Authors and OPENCORES.ORG                 //// 
////                                                              //// 
//// This source file may be used and distributed without         //// 
//// restriction provided that this copyright statement is not    //// 
//// removed from the file and that any derivative work contains  //// 
//// the original copyright notice and the associated disclaimer. //// 
////                                                              //// 
//// This source file is free software; you can redistribute it   //// 
//// and/or modify it under the terms of the GNU Lesser General   //// 
//// Public License as published by the Free Software Foundation; //// 
//// either version 2.1 of the License, or (at your option) any   //// 
//// later version.                                               //// 
////                                                              //// 
//// This source is distributed in the hope that it will be       //// 
//// useful, but WITHOUT ANY WARRANTY; without even the implied   //// 
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //// 
//// PURPOSE.  See the GNU Lesser General Public License for more //// 
//// details.                                                     //// 
////                                                              //// 
//// You should have received a copy of the GNU Lesser General    //// 
//// Public License along with this source; if not, download it   //// 
//// from http://www.opencores.org/lgpl.shtml                     //// 
////                                                              ////
//////////////////////////////////////////////////////////////////////

module chess_controller(
	_ckl_i,
	_rst_i,
	pos_i,
	empty_i,
	sampling_time_i,
	failed_color_o,
	failed_o,
	gamer_o,
	led_o
	); // End of port list
	
	//-------------Input Ports-----------------------------
	input _ckl_i, _rst_i,empty_i,sampling_time_i;
	input [3:0] pos_i;
	 
	//-------------Output Ports----------------------------
	output failed_color_o,failed_o,gamer_o,led_o;

	//-------------Input ports Data Type-------------------
	// By rule all the input ports should be wires   
	wire _ckl_i, _rst_i,empty_i,sampling_time_i;
	wire [3:0] pos_i;
	
	wire write, endWrite, check, upPiece, downPiece;
	wire [7:0] data_i;
	wire [3:0] address, upPos, downPos;
	wire [3:0] data_o;
	
	//-------------Output Ports Data Type------------------
	// Output port can be a storage element (reg) or a wire
   //wire failed_color_o, failed_o, winner_o, gamer_o;
	
	//------------Code Starts Here-------------------------
	
	Board_controller board_controller(._ckl_i(_ckl_i), ._rst_i(_rst_i), .pos_i(pos_i), .empty_i(empty_i), .sampling_time_i(sampling_time_i),
						.data_i(data_i), .address_i(address), .write_i(write), .up_piece_o(upPiece), .down_piece_o(downPiece),
						.up_pos_o(upPos), .down_pos_o(downPos), .end_write_o(endWrite), .data_o(data_o) );
	
	Fsm_controller fsm_controller(._ckl_i(_ckl_i), ._rst_i(_rst_i), .end_write_i(endWrite), .check_i(check),
						.up_piece_i(upPiece), .up_pos_i(upPos), .down_piece_i(downPiece), .down_pos_i(downPos), .color_piece_i(data_o[3:3]),
						.id_piece_i(data_o[2:0]), .failed_color_o(failed_color_o), .failed_o(failed_o), .gamer_o(gamer_o), .data_o(data_i),
						.address_o(address), .write_o(write),.led_o(led_o) );

	Check_Pieces check_pieces(._ckl_i(_ckl_i), ._rst_i(_rst_i), .pos_x_initial_i(upPos[1:0]), .pos_y_initial_i(upPos[3:2]),
						.pos_x_end_i(downPos[1:0]), .pos_y_end_i(downPos[3:2]), .id_piece_i(data_o[2:0]), .team_i(data_o[3:3]),
						.check_o(check) );
	
endmodule
